PC28F128P30BF65

Introduction

This document provides information about the Numonyx® AxcellTM P30-65nm Single Bit per Cell (SBC) Flash memory and describes its features, operations, and specifications.

Overview

P30-65nm SBC device provides high performance on a 16-bit data bus. Individually erasable memory blocks are sized for optimum code and data storage. Upon initial power-up or return from reset, the device defaults to asynchronous page-mode read. Configuring the Read Configuration Register (RCR) enables synchronous burst-mode reads. In synchronous burst mode, output data is synchronized with a user-supplied clock signal. A WAIT signal provides easy CPU-to-flash memory synchronization.

Product Features

■ High Performance:
— 65ns initial access time for Easy BGA and QUAD+
— 75ns initial access time for TSOP
— 25ns 8-word asynchronous-page read mode
— 52MHz with zero WAIT states, 17ns clock-todata output synchronous-burst read mode
— 4-, 8-, 16- and continuous-word options for burst mode
— 1.8V Low Power buffered programming at 1.8MByte/s (Typ) using 256-word buffer
— Buffered Enhanced Factory Programming at 3.2MByte/s (typ) using 256-word buffer
■ Architecture:
— Asymmetrically-blocked architecture
— Four 32-KByte parameter blocks: top or bottom configuration
— 128-KByte array blocks
— Blank Check to verify an erased block
■ Voltage and Power:
— VCC (core) voltage: 1.7V – 2.0V
— VCCQ (I/O) voltage: 1.7V – 3.6V
— Standby current: 30µA(Typ)/55µA(Max)
— Continuous synchronous read current: 23mA (Typ)/28mA (Max) at 52MHz
■ Enhanced Security:
— Absolute write protection: VPP = Vss
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down capability
— Password Access feature
— One-Time Programmable Register:
— 64 OTP bits, programmed with unique information by Numonyx
— 2112 OTP bits, available for customer programming
■ Software:
— 20µs (Typ) program suspend
— 20µs (Typ) erase suspend
— Basic Command Set and Extended Function Interface (EFI) Command Set compatible
— Common Flash Interface capable
■ Density and Packaging:
— 56-Lead TSOP (128-Mbit, 64-Mbit)
— 64-Ball Easy BGA (128-Mbit, 64-Mbit)
— 88-Ball QUAD+ Package (128-Mbit)
— 16-bit wide data bus
■ Quality and Reliability:
— JESD47E Compliant
— Operating temperature: –40°C to +85°C
— Minimum 100,000 erase cycles
— 65nm process technology