MC9S08SE4CTG

Features:

• 8-Bit HCS08 Central Processor Unit (CPU)
– 20 MHz HCS08 CPU (central processor unit)
– 10 MHz internal bus frequency
– HC08 instruction set with added BGND
– Support for up to 32 interrupt/reset sources
•On-Chip Memory
– Up to 8 KB of on-chip in-circuit programmable flash memory with block protection and security options
– Up to 512 bytes of on-chip RAM
• Power-Saving Modes
– Wait plus two stops
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supports bus frequencies from 1 MHz to 10 MHz.
• System Protection
– Optional computer operating properly (COP) reset with option to run from independent 1 kHz internal clock source or the bus clock
– Low voltage detection
– Illegal opcode detection with reset
– Illegal address detection with reset
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting during in-circuit debugging
• Peripherals
– SCI— Full duplex non-return to zero (NRZ); LIN master extended break generation; LIN slave extended break detection; wakeup on active edge
– ADC — 10-channel, 10-bit resolution; 2.5 μs conversion time; automatic compare function; 1.7 mV/°C temperature sensor; internal bandgap reference channel; runs in stop3
– TPMx— One 2-channel (TPM1) and one 1-channel (TPM2) 16-bit timer/pulse-width modulator (TPM) modules; selectable input capture, output compare, and edge- aligned PWM capabilityon each channel; timer module may be configured for buffered, centered PWM (CPWM) on all channels
– KBI— 8-pin keyboard interrupt module
– RTC— Real-time counter with binary- or decimal-based prescaler
• Input/Output
– Software selectable pullups on ports when used as inputs
– Software selectable slew ratecontrol on ports when used as outputs
– Software selectable drive strength on ports when used as outputs
– Master reset pin and power-on reset (POR)
– Internal pullup on RESET, IRQ, and BKGD/MS pins to reduce customer system cost
• Package Options
– 28-pin PDIP
– 28-pin SOIC
– 16-pin TSSOP