NB7V586MMNR4G

The NB7V586M is a 1:6 CML clock/data distribution chip with a 2:1 clock/data input multiplexer with input selector pins. the INx/INxb inputs include internal 50 Ω terminating resistors and accept differential LVPECL, CML, or LVDS logic levels. the INx/INxb inputs and core logic are powered from a 1.8 V supply. The NB7V586M generates six identical copies of the differential CML outputs for clock or data. The outputs are configured as three sets of two differential pairs. Each group (or all three) can be powered from any combination of 1.8 V or 1.2 V supplies. The 16 mA differential CML output structure provides matched internal 50 Ω source termination and 400 mV output swing when the external receiver is terminated to the VCCOx with a 50 Ω resistor. 1:6 fan-out design is optimized for low output skew and minimal jitter for SONET, GigE, fiber optic channels, backside electrodes, and other clock/data distribution applications operating up to 6 GHz or 10 Gb/s typical. The VREFAC reference output can be used to re-bias capacitor-coupled differential and single-ended input signals.The NB7V586M is available in a small 5mm x 5mm 32-pin QFN lead-free package.