STM32F101VBT6

Description

The STM32F101xB and STM32F101x8 medium-density access line family incorporates the
high-performance ARM® Cortex® -M3 32-bit RISC core operating at a 36 MHz frequency,
high-speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 16
Kbytes), and an extensive range of enhanced peripherals and I/Os connected to two APB
buses. All devices offer standard communication interfaces (two I2Cs, two SPIs, and up to
three USARTs), one 12-bit ADC and three general-purpose 16-bit timers

Features

● Core: ARM® 32-bit Cortex® -M3 CPU
– 36 MHz maximum frequency,
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
– Single-cycle multiplication and hardware
division
● Memories
– 64 to 128 Kbytes of Flash memory
– 10 to 16 Kbytes of SRAM
● Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
detector (PVD)
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
● Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
● Debug mode
– Serial wire debug (SWD) and JTAG
interfaces
● DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I 2 Cs and USARTs
● 1 × 12-bit, 1 µs A/D converter (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Temperature sensor
● Up to 80 fast I/O ports

– 26/37/51/80 I/Os, all mappable on 16
external interrupt vectors and almost all
5 V-tolerant
● Six timers
– Three 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– 2 watchdog timers (Independent and
Window)
– SysTick timer: 24-bit downcounter
● Up to 7 communication interfaces
– Up to 2 x I2C interfaces (SMBus/PMBus)
– Up to 3 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– Up to 2 SPIs (18 Mbit/s)
● CRC calculation unit, 96-bit unique ID
● ECOPACK® packages