Description

The CDCV304PWR is a high-performance, low-skew, low-jitter, phase locked loop clock driver specifically designed for use with DDR (Double Data Rate) synchronous DRAMs. It is a part of the Clock Buffers and Drivers family.

Specifications and Features

• Supports 60 MHz to 200 MHz operation range
• Distributes one differential clock input pair to ten differential clock outputs pairs
• Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification
• External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input
• Supports 2.5V analog supply voltage (AVCC), and 2.5 V VDDQ
• No external RC network required
• Sleep mode detection
• 48pin TSSOP (Thin Shrink Small Outline Package)

Application Scenarios

The CDCV304PWR is mainly used in electronic devices utilizing DDR synchronous DRAMs where high-performance, low-skew, low-jitter clock drivers are required.

Comparison

• High-performance and low-skew clock driver for DDR synchronous DRAMs.
• Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification.
• Sleep mode detection feature.

• The CDCV304PWR is not compatible with electronic devices not utilizing DDR synchronous DRAMs that require high-performance, low-skew, low-jitter clock drivers.